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156
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VLSID
2004
IEEE
16 years 7 months ago
2004
IEEE
{A new low-power design method produces CMOS circuits that consume the least dynamic power at the highest speed permitted under the technology constraint. A gate is characterized b...
213
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HPCA
2008
IEEE
16 years 7 months ago
2008
IEEE
Interconnection networks-on-chip (NOCs) are rapidly replacing other forms of interconnect in chip multiprocessors and system-on-chip designs. Existing interconnection networks use...
163
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HPCA
2005
IEEE
16 years 7 months ago
2005
IEEE
Dynamic voltage and frequency scaling (DVFS) is a widely-used method for energy-efficient computing. In this paper, we present a new intra-task online DVFS scheme for multiple clo...
155
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HPCA
2003
IEEE
16 years 7 months ago
2003
IEEE
Although caches for decades have been the backbone of the memory system, the speed gap between CPU and main memory suggests their augmentation with prefetching mechanisms. Recentl...
311
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POPL
2008
ACM
16 years 7 months ago
2008
ACM
Self-adjusting computation enables writing programs that can automatically and efficiently respond to changes to their data (e.g., inputs). The idea behind the approach is to stor...