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ISCA
2011
IEEE
522views Hardware» more  ISCA 2011»
14 years 10 months ago
CPPC: correctable parity protected cache
Due to shrinking feature sizes processors are becoming more vulnerable to soft errors. Write-back caches are particularly vulnerable since they hold dirty data that do not exist i...
Mehrtash Manoochehri, Murali Annavaram, Michel Dub...
ISCA
2011
IEEE
270views Hardware» more  ISCA 2011»
14 years 10 months ago
Sampling + DMR: practical and low-overhead permanent fault detection
With technology scaling, manufacture-time and in-field permanent faults are becoming a fundamental problem. Multi-core architectures with spares can tolerate them by detecting an...
Shuou Nomura, Matthew D. Sinclair, Chen-Han Ho, Ve...
ISCA
2011
IEEE
269views Hardware» more  ISCA 2011»
14 years 10 months ago
Crafting a usable microkernel, processor, and I/O system with strict and provable information flow security
High assurance systems used in avionics, medical implants, and cryptographic devices often rely on a small trusted base of hardware and software to manage the rest of the system. ...
Mohit Tiwari, Jason Oberg, Xun Li 0001, Jonathan V...
CASON
2010
IEEE
14 years 10 months ago
Social Network Reduction Based on Stability
—The analysis of social networks is concentrated especially on uncovering hidden relations and properties of network members (vertices). Most of the current approaches are focuse...
Milos Kudelka, Zdenek Horak, Václav Sn&aacu...
MANSCI
2011
14 years 9 months ago
Dynamic Price Competition with Fixed Capacities
Many revenue management (RM) industries are characterized by (a) fixed capacities in the short term (e.g., hotel rooms, seats on an airline flight), (b) homogeneous products (e....
Victor Martínez-de-Albéniz, Kalyan T...
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