14642 search results - page 2344 / 2929 » It's Time for a Change |
175
click to vote
ICCAD
2006
IEEE
16 years 4 months ago
2006
IEEE
We describe a transition fault model, which is easy to simulate under test sequences that are applied at-speed, and provides a target for the generation of at-speed test sequences...
186
click to vote
ICCAD
2005
IEEE
16 years 4 months ago
2005
IEEE
Modern design requirements have brought additional complexities to netlists and layouts. Millions of components, whitespace resources, and fixed/movable blocks are just a few to ...
175
click to vote
ICCAD
2005
IEEE
16 years 4 months ago
2005
IEEE
Clustering (or partitioning) is a crucial step between logic synthesis and physical design in the layout of a large scale design. A design verified at the logic synthesis level m...
184
click to vote
FPGA
2010
ACM
16 years 4 months ago
2010
ACM
Monte Carlo based SSTA serves as the golden standard against alternative SSTA algorithms, but it is seldom used in practice due to its high computation time. In this paper, we acc...
216
click to vote
WISTP
2010
Springer
16 years 2 months ago
2010
Springer
ct This paper discusses the practical implementation of a novel security tool termed SIMPL system, which was introduced in [1]. SIMPL systems can be regarded as a public key versio...