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ASAP
2003
IEEE
113views Hardware» more  ASAP 2003»
16 years 5 days ago
A VLSI Architecture for Advanced Video Coding Motion Estimation
With the advent of new video standards such as MPEG-4 part-10 and H.264/H.26L, demands for advanced video coding (AVC), particularly in area of variable block searching motion est...
Swee Yeow, John V. McCanny
QOSA
2010
Springer
15 years 10 months ago
Good Architecture = Good (ADL + Practices)
In order to ensure the quality of their software development process, companies incorporate best practices from recognized repositories or from their own experiences. These best pr...
Vincent Le Gloahec, Régis Fleurquin, Salah ...
HPCA
2001
IEEE
16 years 7 months ago
An Architectural Evaluation of Java TPC-W
The use of the Java programming language for implementing server-side application logic is increasing in popularity, yet there is very little known about the architectural require...
Harold W. Cain, Ravi Rajwar, Morris Marden, Mikko ...
ICPP
2007
IEEE
16 years 1 months ago
Architectural Challenges in Memory-Intensive, Real-Time Image Forming
The real-time image forming in future, high-end synthetic aperture radar systems is an example of an application that puts new demands on computer architectures. The initial quest...
Anders Ahlander, H. Hellsten, K. Lind, J. Lindgren...
ISCAS
2011
IEEE
288views Hardware» more  ISCAS 2011»
14 years 10 months ago
Multi-layer parallel decoding algorithm and vlsi architecture for quasi-cyclic LDPC codes
—We propose a multi-layer parallel decoding algorithm and VLSI architecture for decoding of structured quasi-cyclic low-density parity-check codes. In the conventional layered de...
Yang Sun, Guohui Wang, Joseph R. Cavallaro