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ICCD
2007
IEEE
146views Hardware» more  ICCD 2007»
16 years 3 months ago
Exploring DRAM cache architectures for CMP server platforms
As dual-core and quad-core processors arrive in the marketplace, the momentum behind CMP architectures continues to grow strong. As more and more cores/threads are placed on-die, ...
Li Zhao, Ravi R. Iyer, Ramesh Illikkal, Donald New...
AINA
2007
IEEE
16 years 1 months ago
Sim-PowerCMP: A Detailed Simulator for Energy Consumption Analysis in Future Embedded CMP Architectures
Continuous improvements in integration scale have made major microprocessor vendors to move to designs that integrate several processor cores on the same chip. Chip-multiprocessor...
Antonio Flores, Juan L. Aragón, Manuel E. A...
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INFOCOM
2005
IEEE
16 years 10 days ago
The one-to-many TCP overlay: a scalable and reliable multicast architecture
Abstract— We consider reliable multicast in overlay networks where nodes have finite-size buffers and are subject to failures. We address issues of end-to-end reliability and th...
François Baccelli, Augustin Chaintreau, Zhe...
ISCA
2005
IEEE
147views Hardware» more  ISCA 2005»
16 years 10 days ago
Interconnections in Multi-Core Architectures: Understanding Mechanisms, Overheads and Scaling
This paper examines the area, power, performance, and design issues for the on-chip interconnects on a chip multiprocessor, attempting to present a comprehensive view of a class o...
Rakesh Kumar, Victor V. Zyuban, Dean M. Tullsen
PDCAT
2005
Springer
16 years 7 days ago
Trusted Computing-Based Security Architecture For 4G Mobile Networks
In this paper security requirements and security architecture for 4G systems are presented with the consideration of Trusted Computing (TC) for mobile equipment (ME). The security...
Yu Zheng, Dake He, Weichi Yu, Xiaohu Tang