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ISCA
2009
IEEE
214views Hardware» more  ISCA 2009»
16 years 1 months ago
Phastlane: a rapid transit optical routing network
Tens and eventually hundreds of processing cores are projected to be integrated onto future microprocessors, making the global interconnect a key component to achieving scalable c...
Mark J. Cianchetti, Joseph C. Kerekes, David H. Al...
ISDA
2009
IEEE
16 years 1 months ago
GPU-Based Road Sign Detection Using Particle Swarm Optimization
—Road Sign Detection is a major goal of Advanced Driving Assistance Systems (ADAS). Since the dawn of this discipline, much work based on different techniques has been published ...
Luca Mussi, Stefano Cagnoni, Fabio Daolio
ATAL
2009
Springer
16 years 1 months ago
MABLE: a framework for learning from natural instruction
The Modular Architecture for Bootstrapped Learning Experiments (MABLE) is a system that is being developed to allow humans to teach computers in the most natural manner possible: ...
Roger Mailler, Daniel Bryce, Jiaying Shen, Ciaran ...
BTW
2009
Springer
146views Database» more  BTW 2009»
16 years 1 months ago
Towards Flash Disk Use in Databases - Keeping Performance While Saving Energy?
Abstract: Green computing or energy saving when processing information is primarily considered a task of processor development. We, however, advocate that a holistic approach is ne...
Theo Härder, Karsten Schmidt 0002, Yi Ou, Seb...
EUROPAR
2009
Springer
16 years 1 months ago
High Performance Matrix Multiplication on Many Cores
Moore’s Law suggests that the number of processing cores on a single chip increases exponentially. The future performance increases will be mainly extracted from thread-level par...
Nan Yuan, Yongbin Zhou, Guangming Tan, Junchao Zha...
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