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ASPDAC
2007
ACM
135views Hardware» more  ASPDAC 2007»
15 years 10 months ago
A Parameterized Architecture Model in High Level Synthesis for Image Processing Applications
- Most image processing applications are computationally intensive and data intensive. Reconfigurable hardware boards provide a convenient and flexible solution to speed up these a...
Yazhuo Dong, Yong Dou
AOSE
2005
Springer
15 years 12 months ago
Using the Analytic Hierarchy Process for Evaluating Multi-Agent System Architecture Candidates
Abstract. Although much effort has been spent on suggesting and implementing new architectures of Multi-Agent Systems (MAS), the evaluation and comparison of these has often been d...
Paul Davidsson, Stefan J. Johansson, Mikael Svahnb...
ISCAS
2006
IEEE
120views Hardware» more  ISCAS 2006»
16 years 11 days ago
Architecture of a VLSI cellular processor array for synchronous/asynchronous image processing
— This paper describes a new architecture for a cellular processor array integrated circuit, which operates in both discreteand continuous-time domains. Asynchronous propagation ...
Alexey Lopich, Piotr Dudek
CODES
2004
IEEE
15 years 10 months ago
Automatic synthesis of system on chip multiprocessor architectures for process networks
In this paper, we present an approach for automatic synthesis of System on Chip (SoC) multiprocessor architectures for applications expressed as process networks. Our approach is ...
Basant Kumar Dwivedi, Anshul Kumar, M. Balakrishna...
CBSE
2006
Springer
15 years 10 months ago
A Process for Resolving Performance Trade-Offs in Component-Based Architectures
Designing architectures requires the balancing of multiple system quality objectives. In this paper, we present techniques that support the exploration of the quality properties of...
Egor Bondarev, Michel R. V. Chaudron, Peter H. N. ...