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ICCD
1999
IEEE
115views Hardware» more  ICCD 1999»
15 years 11 months ago
Customization of a CISC Processor Core for Low-Power Applications
This paper describes a core-customization process of a CISC processor core for a given application program. It aims at the power reduction in the CISC processor core by fully util...
You-Sung Chang, Bong-Il Park, In-Cheol Park, Chong...
ICPP
1999
IEEE
15 years 11 months ago
Trace-Level Reuse
Trace-level reuse is based on the observation that some traces (dynamic sequences of instructions) are frequently repeated during the execution of a program, and in many cases, th...
Antonio González, Jordi Tubella, Carlos Mol...
ICPP
1999
IEEE
15 years 11 months ago
Impact on Performance of Fused Multiply-Add Units in Aggressive VLIW Architectures
Loops are the main time consuming part of programs based on floating point computations. The performance of the loops is limited either by recurrences in the computation or by the...
David López, Josep Llosa, Eduard Ayguad&eac...
ICPP
1999
IEEE
15 years 11 months ago
Improving Performance of Load-Store Sequences for Transaction Processing Workloads on Multiprocessors
On-line transaction processing exhibits poor memory behavior in high-end multiprocessor servers because of complex sharing patterns and substantial interaction between the databas...
Jim Nilsson, Fredrik Dahlgren
IPPS
1999
IEEE
15 years 11 months ago
High Performance Computing for the Masses
Abstract. Recent advances in software and hardware for clustered computing have allowed scientists and computing specialists to take advantage of commodity processors in solving ch...
Mark J. Clement, Quinn Snell, Glenn Judd
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