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ISQED
2003
IEEE
113views Hardware» more  ISQED 2003»
15 years 12 months ago
Using Integer Equations for High Level Formal Verification Property Checking
This paper describes the use of integer equations for high level modeling digital circuits for application of formal verification properties at this level. Most formal verificatio...
Bijan Alizadeh, Mohammad Reza Kakoee
ISQED
2003
IEEE
85views Hardware» more  ISQED 2003»
15 years 12 months ago
Interoperability Beyond Design: Sharing Knowledge between Design and Manufacturing
The nature of IC design has is necessarily evolving to a more data-centric design flow in which EDA tools share a common information in a design database without the negative cost...
D. R. Cottrell, T. J. Grebinski
RTSS
2003
IEEE
15 years 12 months ago
Experimental Evaluation of Code Properties for WCET Analysis
This paper presents a quantification of the timing effects that advanced processor features like data and instruction cache, pipelines, branch prediction units and out-oforder ex...
Antoine Colin, Stefan M. Petters
VL
2003
IEEE
128views Visual Languages» more  VL 2003»
15 years 12 months ago
A visual approach to development of web services providers/requestors
An idea of automatic generation of Web applications from templates has been proposed [1, 2, 3, 4]. A software system called T-Web system has been implemented based on the idea to ...
Kornkamol Jamroendararasame, Takehiro Tokuda, Tets...
WCRE
2003
IEEE
15 years 12 months ago
RegReg: a Lightweight Generator of Robust Parsers for Irregular Languages
In reverse engineering, parsing may be partially done to extract lightweight source models. Parsing code containing preprocessing directives, syntactical errors and embedded langu...
Mario Latendresse
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