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TC
1998
15 years 6 months ago
Methodologies for Tolerating Cell and Interconnect Faults in FPGAs
—The very high levels of integration and submicron device sizes used in current and emerging VLSI technologies for FPGAs lead to higher occurrences of defects and operational fau...
Fran Hanchek, Shantanu Dutt
SIGMETRICS
2009
ACM
157views Hardware» more  SIGMETRICS 2009»
16 years 1 months ago
Delay tolerant bulk data transfers on the internet
Many emerging scientific and industrial applications require transferring multiple Tbytes of data on a daily basis. Examples include pushing scientific data from particle accele...
Nikolaos Laoutaris, Georgios Smaragdakis, Pablo Ro...
INFOCOM
2006
IEEE
16 years 20 days ago
DFT-MSN: The Delay/Fault-Tolerant Mobile Sensor Network for Pervasive Information Gathering
Abstract— This paper focuses on the Delay/Fault-Tolerant Mobile Sensor Network (DFT-MSN) for pervasive information gathering. We develop simple and efficient data delivery schem...
Yu Wang, Hongyi Wu
ICCD
2005
IEEE
159views Hardware» more  ICCD 2005»
16 years 7 days ago
Architectural-Level Fault Tolerant Computation in Nanoelectronic Processors
Nanoelectronic devices are expected to have extremely high and variable fault rates; thus future processor architectures based on these unreliable devices need to be built with fa...
Wenjing Rao, Alex Orailoglu, Ramesh Karri
INFOCOM
2009
IEEE
16 years 1 months ago
Fair Routing in Delay Tolerant Networks
—The typical state-of-the-art routing algorithms for delay tolerant networks are based on best next hop hill-climbing heuristics in order to achieve throughput and efficiency. T...
Josep M. Pujol, Alberto Lopez Toledo, Pablo Rodrig...