Sciweavers

2587 search results - page 219 / 518
» Intrusion Tolerant Systems
Sort
View
DFT
2003
IEEE
120views VLSI» more  DFT 2003»
15 years 12 months ago
Implementation and Testing of Fault-Tolerant Photodiode-Based Active Pixel Sensor (APS)
The implementation of imaging arrays for System-On-a-Chip (SOC) is aided by using faulttolerant light sensors. Fault-tolerant redundancy in an Active Pixel Sensor (APS) is obtaine...
Sunjaya Djaja, Glenn H. Chapman, Desmond Y. H. Che...
DFT
2003
IEEE
142views VLSI» more  DFT 2003»
15 years 12 months ago
Exploiting Instruction Redundancy for Transient Fault Tolerance
This paper presents an approach for integrating fault-tolerance techniques into microprocessors by utilizing instruction redundancy as well as time redundancy. Smaller and smaller...
Toshinori Sato
IPPS
2000
IEEE
15 years 11 months ago
Fault-Tolerant Distributed-Shared-Memory on a Broadcast-Based Interconnection Network
The Simultaneous Optical Multiprocessor Exchange Bus (SOME-Bus) is a low-latency, high-bandwidth interconnection network which directly links arbitrary pairs of processor nodes wit...
Diana Hecht, Constantine Katsinis
IPPS
1999
IEEE
15 years 11 months ago
A Parallel Algorithm for Singular Value Decomposition as Applied to Failure Tolerant Manipulators
The system of equations that govern kinematically redundant manipulators is commonly solved by nding the singular value decomposition (SVD) of the corresponding Jacobian matrix. T...
Tracy D. Braun, Anthony A. Maciejewski, Howard Jay...
IPPS
1998
IEEE
15 years 11 months ago
Fault-Tolerant Message Routing for Multiprocessors
In this paper the problem of fault-tolerant message routing in two-dimensional meshes, with each inner node having 4 neighbors, is investigated. It is assumed that some nodes/links...
Lev Zakrevski, Mark G. Karpovsky