2587 search results - page 190 / 518 » Intrusion Tolerant Systems |
164
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DFT
2009
IEEE
16 years 1 months ago
2009
IEEE
Pre-fabrication design verification and post-fabrication chip testing are two important stages in the product realization process. These two stages consume a large part of resourc...
170
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DSN
2005
IEEE
16 years 6 days ago
2005
IEEE
Designing a distributed fault tolerance algorithm requires careful analysis of both fault models and diagnosis strategies. A system will fail if there are too many active faults, ...
173
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ECRTS
2000
IEEE
15 years 11 months ago
2000
IEEE
The imprecise computation(IC) model is a general scheduling framework, capable of expressing the precision vs. timeliness trade-off involved in many current real-time applications...
212
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SC
2000
ACM
15 years 11 months ago
2000
ACM
This paper shows how a state-of-the-art software distributed shared-memory (DSM) protocol can be efficiently extended to tolerate single-node failures. In particular, we extend a ...
190
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SIES
2010
IEEE
15 years 4 months ago
2010
IEEE
In this paper we present an approach to increase the fault tolerance in FlexRay networks by introducing backup nodes to replace defect ECUs (Electronic Control Units). In order to ...