Test application time is an important factor in the overall cost of VLSI chip testing. We present a new ATPG approach for generating compact test sequences for sequential circuits...
Yanti Santoso, Matthew C. Merten, Elizabeth M. Rud...
A fault-oriented sequential circuit test generator is described in which various types of distinguishing sequences are derived, both statically and dynamically, to aid the test ge...
Michael S. Hsiao, Elizabeth M. Rudnick, Janak H. P...
This article, which lies within the data mining framework, proposes a method to build classifiers based on the evolution of rules. The method, named REC (Rule Evolution for Classif...
Abstract. In this paper we report preliminary findings of using cellular automata (CA) as an underlying architecture in controlling the motion of a fivelegged brittle star typed ro...
We describe a Markov chain Bayesian classification tool, SCS, that can perform data-driven classification of proteins and protein segments. Training data for interesting classific...
Timothy Meekhof, Gary W. Daughdrill, Robert B. Hec...