— We present BARAKA, a new simulator for SANETs. The evaluation of algorithms developed for communication and co-operation in this context is usually accomplished separately. On ...
Thomas Halva Labella, Isabel Dietrich, Falko Dress...
— System-on-Chip designs often have a large number of timing domains. Communication between these domains requires synchronization, and the failure probabilities of these synchro...
The clock tree is the interconnect net on Systems-on-Chip (SoCs) with the heaviest load and consumes up to 40% of the overall power budget. Substantial savings of the overall powe...
Saif Ali Butt, Stefan Schmermbeck, Jurij Rosenthal...
Recent advancements in FPGA technology have allowed manufacturers to place general-purpose processors alongside user-configurable logic gates on a single chip. At first glance, ...
Sensor network technology is pushing towards integration into the business world. By using sensor node hardware to augment real life business items it is possible to capture the wo...
Till Riedel, Christian Decker, Phillip Scholl, Alb...