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» Integrating Temporal Logics
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DFT
1999
IEEE
125views VLSI» more  DFT 1999»
15 years 10 months ago
Algorithms for Efficient Runtime Fault Recovery on Diverse FPGA Architectures
The inherent redundancy and in-the-field reconfiguration capabilities of field programmable gate arrays (FPGAs) provide alternatives to integrated circuit redundancy-based fault r...
John Lach, William H. Mangione-Smith, Miodrag Potk...
TPHOL
1999
IEEE
15 years 10 months ago
Lifted-FL: A Pragmatic Implementation of Combined Model Checking and Theorem Proving
Combining theorem proving and model checking o ers the tantalizing possibility of e ciently reasoning about large circuits at high levels of abstraction. We have constructed a syst...
Mark Aagaard, Robert B. Jones, Carl-Johan H. Seger
TACAS
1999
Springer
88views Algorithms» more  TACAS 1999»
15 years 10 months ago
A Theorem Prover-Based Analysis Tool for Object-Oriented Databases
We present a theorem-prover based analysis tool for object-oriented database systems with integrity constraints. Object-oriented database specifications are mapped to higher-order...
David Spelt, Susan Even
ISCA
1998
IEEE
125views Hardware» more  ISCA 1998»
15 years 10 months ago
Active Pages: A Computation Model for Intelligent Memory
Microprocessors and memory systems su er from a growing gap in performance. We introduce Active Pages, a computation model which addresses this gap by shifting data-intensive comp...
Mark Oskin, Frederic T. Chong, Timothy Sherwood
RSP
1998
IEEE
162views Control Systems» more  RSP 1998»
15 years 10 months ago
The STEP Standard as an Approach for Design and Prototyping
STEP is an ISO standard (ISO-10303) for the computerinterpretable representation and exchange of product data. Parts of STEP standardize conceptual structures and usage ofinformat...
Alain Plantec, Vincent Ribaud