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» Integrating Temporal Logics
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ETS
2009
IEEE
98views Hardware» more  ETS 2009»
15 years 4 months ago
Increasing Robustness of SAT-based Delay Test Generation Using Efficient Dynamic Learning Techniques
Due to the increased speed in modern designs, testing for delay faults has become an important issue in the postproduction test of manufactured chips. A high fault coverage is nee...
Stephan Eggersglüß, Rolf Drechsler
JMLR
2010
102views more  JMLR 2010»
15 years 1 months ago
Visualization of Online Discussion Forums
This paper describes a set of visualization tools which aid the understanding of discussion topics and trends in online discussion forums. The tools integrate into the forum'...
Mitja Trampus, Marko Grobelnik
ICASSP
2011
IEEE
14 years 10 months ago
Epileptic seizure prediction using the spatiotemporal correlation structure of intracranial EEG
A patient-specific seizure prediction algorithm is proposed that extracts novel multivariate signal coherence features from ECoG recordings and classifies a patient’s pre-seiz...
James R. Williamson, Daniel W. Bliss, David W. Bro...
AAAI
2011
14 years 6 months ago
Differential Eligibility Vectors for Advantage Updating and Gradient Methods
In this paper we propose differential eligibility vectors (DEV) for temporal-difference (TD) learning, a new class of eligibility vectors designed to bring out the contribution of...
Francisco S. Melo
DATE
2009
IEEE
150views Hardware» more  DATE 2009»
16 years 1 months ago
A software-supported methodology for exploring interconnection architectures targeting 3-D FPGAs
—Interconnect structures significantly contribute to the delay, power consumption, and silicon area of modern reconfigurable architectures. The demand for higher clock frequencie...
Kostas Siozios, Vasilis F. Pavlidis, Dimitrios Sou...