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» Integrating Temporal Logics
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FPGA
2007
ACM
185views FPGA» more  FPGA 2007»
16 years 1 months ago
Power-aware FPGA logic synthesis using binary decision diagrams
Power consumption in field programmable gate arrays (FPGAs) has become an important issue as the FPGA market has grown to include mobile platforms. In this work we present a power...
Kevin Oo Tinmaung, David Howland, Russell Tessier
IAT
2006
IEEE
16 years 26 days ago
Toward Inductive Logic Programming for Collaborative Problem Solving
In this paper, we tackle learning in distributed systems and the fact that learning does not necessarily involve the participation of agents directly in the inductive process itse...
Jian Huang, Adrian R. Pearce
DATE
2010
IEEE
119views Hardware» more  DATE 2010»
15 years 12 months ago
Exploiting local logic structures to optimize multi-core SoC floorplanning
Abstract—We present a throughput-driven partitioning algorithm and a throughput-preserving merging algorithm for the high-level physical synthesis of latency-insensitive (LI) sys...
Cheng-Hong Li, Sampada Sonalkar, Luca P. Carloni
ECAI
2000
Springer
15 years 11 months ago
Encoding Information Fusion in Possibilistic Logic: A General Framework for Rational Syntactic Merging
The problem of merging multiple sources information is central in many information processing areas such as databases integration problems, multiple criteria decision making, exper...
Salem Benferhat, Didier Dubois, Souhila Kaci, Henr...
SP
1997
IEEE
134views Security Privacy» more  SP 1997»
15 years 11 months ago
A Logical Language for Expressing Authorizations
A major drawback of existing access control systems is that they have all been developed with a specific access control policy in mind. This means that all protection requirement...
Sushil Jajodia, Pierangela Samarati, V. S. Subrahm...