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» Integrating Temporal Logics
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CSMR
2004
IEEE
15 years 10 months ago
Using Split Objects for Maintenance and Reengineering Tasks
Language integration is an important issue in the area of software maintenance and reengineering. We describe a novel solution in this area: automatically applied and composed spl...
Uwe Zdun
IISWC
2009
IEEE
16 years 1 months ago
Logicalization of communication traces from parallel execution
—Communication traces are integral to performance modeling and analysis of parallel programs. However, execution on a large number of nodes results in a large trace volume that i...
Qiang Xu, Jaspal Subhlok, Rong Zheng, Sara Voss
GLVLSI
2007
IEEE
140views VLSI» more  GLVLSI 2007»
16 years 1 months ago
Structured and tuned array generation (STAG) for high-performance random logic
Regularly structured design techniques can combat complexity on a variety of fronts. We present the Structured and Tuned Array Generation (STAG) design methodology, which provides...
Matthew M. Ziegler, Gary S. Ditlow, Stephen V. Kos...
EH
2003
IEEE
247views Hardware» more  EH 2003»
16 years 4 days ago
Evolvable Building Blocks for Analog Fuzzy Logic Controllers
This work discusses the use of an Evolvable Hardware (EHW) platform in the synthesis of analog electronic circuits for Fuzzy Logic Controllers. A Fuzzy Logic Controller (FLC) is d...
Jorge Luís Machado do Amaral, José F...
ASP
2003
Springer
16 years 2 days ago
Outlier Detection Using Default Logic
Default logic is used to describe regular behavior and normal properties. We suggest to exploit the framework of default logic for detecting outliers - individuals who behave in a...
Fabrizio Angiulli, Rachel Ben-Eliyahu-Zohary, Luig...