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DAC
2007
ACM
16 years 7 months ago
Parameterized Macromodeling for Analog System-Level Design Exploration
In this paper we propose a novel parameterized macromodeling technique for analog circuits. Unlike traditional macromodels that are only extracted for a small variation space, our...
Jian Wang, Xin Li, Lawrence T. Pileggi
IS
2007
15 years 6 months ago
Security Attack Testing (SAT) - testing the security of information systems at design time
For the last few years a considerable number of efforts have been devoted into integrating security issues into information systems development practices. This has led to a number...
Haralambos Mouratidis, Paolo Giorgini
IJCNN
2008
IEEE
16 years 23 days ago
Wafer-scale integration of analog neural networks
Abstract— This paper introduces a novel design of an artificial neural network tailored for wafer-scale integration. The presented VLSI implementation includes continuous-time a...
Johannes Schemmel, Johannes Fieres, Karlheinz Meie...
JISE
2007
98views more  JISE 2007»
15 years 6 months ago
Integrated Buffer and Route Management in a DTN with Message Ferry
Unlike normal wireless ad hoc networks, end-to-end connection may not exist in DTNs Thus, the Message Ferrying (MF) scheme has been proposed as a strategy for providing connectivi...
Mooi Choo Chuah, Wenbin Ma
ICECCS
2005
IEEE
73views Hardware» more  ICECCS 2005»
15 years 12 months ago
Integrating Object-Z with Timed Automata
When designing a complex system, Object-Z is a powerful logic-based language for modeling the system state aspects, and Timed Automata is an excellent graph-based notation for cap...
Jin Song Dong, Roger Duke, Ping Hao