Sciweavers

1624 search results - page 199 / 325
» Integrating Fault-Tolerant Techniques into the Design of Cri...
Sort
View
ICPP
2002
IEEE
15 years 11 months ago
Optimal Code Size Reduction for Software-Pipelined Loops on DSP Applications
Code size expansion of software-pipelined loops is a critical problem for DSP systems with strict code size constraint. Some ad-hoc code size reduction techniques were used to try...
Qingfeng Zhuge, Zili Shao, Edwin Hsing-Mean Sha
CGF
2008
120views more  CGF 2008»
15 years 6 months ago
Generating Color Palettes using Intuitive Parameters
Color is widely used in data visualization to show data values. The proper selection of colors is critical to convey information correctly. In this paper, we present a technique f...
Martijn Wijffelaars, Roel Vliegen, Jarke J. van Wi...
DAC
2005
ACM
16 years 7 months ago
Architecture-adaptive range limit windowing for simulated annealing FPGA placement
Previous research has shown both theoretically and practically that simulated annealing can greatly benefit from the incorporation of an adaptive range limiting window to control ...
Kenneth Eguro, Scott Hauck, Akshay Sharma
JSW
2008
130views more  JSW 2008»
15 years 6 months ago
A Constraint-Driven Executable Model of Dynamic System Reconfiguration
Dynamic system reconfiguration techniques are presented that can enable the systematic evolution of software systems due to unanticipated changes in specification or requirements. ...
D'Arcy Walsh, Francis Bordeleau, Bran Selic
GLVLSI
2002
IEEE
108views VLSI» more  GLVLSI 2002»
15 years 11 months ago
Protected IP-core test generation
Design simplification is becoming necessary to respect the target time-to-market of SoCs, and this goal can be obtained by using predesigned IP-cores. However, their correct inte...
Alessandro Fin, Franco Fummi