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RSP
2003
IEEE
132views Control Systems» more  RSP 2003»
15 years 11 months ago
Rapid Exploration of Pipelined Processors through Automatic Generation of Synthesizable RTL Models
As embedded systems continue to face increasingly higher performance requirements, deeply pipelined processor architectures are being employed to meet desired system performance. ...
Prabhat Mishra, Arun Kejariwal, Nikil Dutt
SEKE
2001
Springer
15 years 11 months ago
Temporal Logic Properties of Java Objects
ct 7 Applying finite-state verification techniques to software systems looks attractive because they are capable of detecting very subtle 8 defects in the logic design of these s...
Radu Iosif, Riccardo Sisto
DATE
2010
IEEE
119views Hardware» more  DATE 2010»
15 years 11 months ago
Exploiting local logic structures to optimize multi-core SoC floorplanning
Abstract—We present a throughput-driven partitioning algorithm and a throughput-preserving merging algorithm for the high-level physical synthesis of latency-insensitive (LI) sys...
Cheng-Hong Li, Sampada Sonalkar, Luca P. Carloni
GEOINFO
2004
15 years 7 months ago
Mediated Geographic Web Feature Services
Abstract With the proliferation of Geographic Information Systems (GIS) and spatial resources over the Internet, there is an increasing demand for robust geospatial information ser...
Mehdi Essid, Omar Boucelma
DATE
2002
IEEE
166views Hardware» more  DATE 2002»
15 years 11 months ago
Event Model Interfaces for Heterogeneous System Analysis
Complex embedded systems consist of hardware and software components from different domains, such as control and signal processing, many of them supplied by different IP vendors. ...
Kai Richter, Rolf Ernst