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DAC
2000
ACM
16 years 7 months ago
Code compression for low power embedded system design
erse approaches at all levels of abstraction starting from the physical level up to the system level. Experience shows that a highlevel method may have a larger impact since the de...
Haris Lekatsas, Jörg Henkel, Wayne Wolf
GLVLSI
2007
IEEE
140views VLSI» more  GLVLSI 2007»
16 years 21 days ago
Structured and tuned array generation (STAG) for high-performance random logic
Regularly structured design techniques can combat complexity on a variety of fronts. We present the Structured and Tuned Array Generation (STAG) design methodology, which provides...
Matthew M. Ziegler, Gary S. Ditlow, Stephen V. Kos...
FCCM
2005
IEEE
115views VLSI» more  FCCM 2005»
16 years 2 hour ago
FIFO Communication Models in Operating Systems for Reconfigurable Computing
Increasing demands upon embedded systems for higher level services like networking, user interfaces and file system management, are driving growth in fully-featured operating syst...
John A. Williams, Neil W. Bergmann, X. Xie
GECCO
2005
Springer
125views Optimization» more  GECCO 2005»
15 years 12 months ago
Improving EA-based design space exploration by utilizing symbolic feasibility tests
This paper will propose a novel approach in combining Evolutionary Algorithms with symbolic techniques in order to improve the convergence of the algorithm in the presence of larg...
Thomas Schlichter, Christian Haubelt, Jürgen ...
CASES
2005
ACM
15 years 8 months ago
Hardware support for code integrity in embedded processors
Computer security becomes increasingly important with continual growth of the number of interconnected computing platforms. Moreover, as capabilities of embedded processors increa...
Milena Milenkovic, Aleksandar Milenkovic, Emil Jov...