6593 search results - page 834 / 1319 » Integrated Learning Architectures |
194
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FPGA
2004
ACM
15 years 10 months ago
2004
ACM
This paper presents a new approach to timing optimization for FPGA designs, namely incremental physical resynthesis, to answer the challenge of effectively integrating logic and p...
184
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DAC
2006
ACM
15 years 10 months ago
2006
ACM
Conventionally, signal net routing is almost always implemented as Steiner trees. However, non-tree topology is often superior on timing performance as well as tolerance to open f...
190
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DSD
2006
IEEE
15 years 10 months ago
2006
IEEE
Abstract-- Networks-on-Chip will serve as the central integration platform in future complex SoC designs, composed of a large number of heterogeneous processing resources. Most res...
197
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FPL
2006
Springer
15 years 10 months ago
2006
Springer
A Field Programmable Gate Array (FPGA), when used as a platform for implementing special-purpose computing architectures, offers the potential for increased functional parallelism...
196
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EWCBR
2000
Springer
15 years 10 months ago
2000
Springer
Many of today's CBR systems are passive in nature: they require human users to activate them manually and to provide information about the incoming problem explicitly. In this...