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CISIS
2009
IEEE
16 years 1 months ago
Designing Regular Network-on-Chip Topologies under Technology, Architecture and Software Constraints
—Regular multi-core processors are appearing in the embedded system market as high performance software programmable solutions. The use of regular interconnect fabrics for them a...
Francisco Gilabert Villamón, Daniele Ludovi...
DSN
2008
IEEE
16 years 1 months ago
A fault-tolerant directory-based cache coherence protocol for CMP architectures
Current technology trends of increased scale of integration are pushing CMOS technology into the deepsubmicron domain, enabling the creation of chips with a significantly greater...
Ricardo Fernández Pascual, José M. G...
170
Voted
ESCIENCE
2005
IEEE
16 years 14 days ago
GAMA: Grid Account Management Architecture
Security is a critical component of grid systems and while there are numerous software components and tools that provide some capabilities relating to security, there are few comp...
Karan Bhatia, Sandeep Chandra, Kurt Mueller
ISCAS
2005
IEEE
133views Hardware» more  ISCAS 2005»
16 years 13 days ago
Minimal activity mixed-signal VLSI architecture for real-time linear transforms in video
Abstract— The mixed-signal processor performs digital vectormatrix multiplication using internally analog fine-grain parallel computing. The three-transistor CID/DRAM unit cell ...
Rafal Karakiewicz, Roman Genov
GECCO
2004
Springer
16 years 6 days ago
Using Interconnection Style Rules to Infer Software Architecture Relations
Software design techniques emphasize the use of abstractions to help developers deal with the complexity of constructing large and complex systems. These abstractions can also be u...
Brian S. Mitchell, Spiros Mancoridis, Martin Trave...