Sciweavers

6593 search results - page 374 / 1319
» Integrated Learning Architectures
Sort
View
LCTRTS
2001
Springer
15 years 11 months ago
A Dynamic Programming Approach to Optimal Integrated Code Generation
Phase-decoupled methods for code generation are the state of the art in compilers for standard processors but generally produce code of poor quality for irregular target architect...
Christoph W. Keßler, Andrzej Bednarski
SIAMSC
2010
140views more  SIAMSC 2010»
15 years 5 months ago
Parallel High-Order Integrators
In this work we discuss a class of defect correction methods which is easily adapted to create parallel time integrators for multi-core architectures and is ideally suited for deve...
Andrew J. Christlieb, Colin B. Macdonald, Benjamin...
189
Voted
ICES
2003
Springer
165views Hardware» more  ICES 2003»
15 years 12 months ago
Speeding up Hardware Evolution: A Coprocessor for Evolutionary Algorithms
This paper proposes a coprocessor architecture to speed up hardware evolution. It is designed to be implemented in an FPGA with an integrated microprocessor core. The coprocessor r...
Tillmann Schmitz, Steffen G. Hohmann, Karlheinz Me...
DAC
1999
ACM
15 years 11 months ago
Interconnect Analysis: From 3-D Structures to Circuit Models
In this survey paper we describethe combination of: discretized integral formulations, sparsication techniques, and krylov-subspace based model-order reduction that has led to rob...
Mattan Kamon, Nuno Alexandre Marques, Yehia Massou...
ICCAD
2008
IEEE
97views Hardware» more  ICCAD 2008»
16 years 3 months ago
Integrated code and data placement in two-dimensional mesh based chip multiprocessors
— As transistor sizes continue to shrink and the number of transistors per chip keeps increasing, chip multiprocessors (CMPs) are becoming a promising alternative to remain on th...
Taylan Yemliha, Shekhar Srikantaiah, Mahmut T. Kan...