6593 search results - page 1029 / 1319 » Integrated Learning Architectures |
187
click to vote
VLSID
2008
IEEE
16 years 7 months ago
2008
IEEE
In the automatic design of custom instruction set processors, there can be a very large set of potential custom instructions, from which a few instructions are required to be chos...
114
click to vote
VLSID
2004
IEEE
16 years 7 months ago
2004
IEEE
This paper focuses on the investigation of integrated CMOS and Silicon/Germanium (SiGe) devices for highspeed optical receiver circuits. In this paper, we present several competit...
192
click to vote
VLSID
2003
IEEE
16 years 7 months ago
2003
IEEE
Most verification tools and methodologies such as model checking, equivalence checking, hardware verification, software verification, and hardware-software coverification often fl...
158
click to vote
VLSID
2002
IEEE
16 years 7 months ago
2002
IEEE
We describe a new algorithm for floorplan evaluation using timing-driven buffered routing according to a prescribed buffer site map. Specifically, we describe a provably good mult...
165
Voted
VLSID
2002
IEEE
16 years 7 months ago
2002
IEEE
Interconnect delay has become a critical factor in determining the performance of integrated circuits. Routing and buffering are powerful means of improving the circuit speed and ...