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CODES
2007
IEEE
16 years 1 months ago
A code-generator generator for multi-output instructions
We address the problem of instruction selection for Multi-Output Instructions (MOIs), producing more than one result. Such inherently parallel hardware instructions are very commo...
Hanno Scharwächter, Jonghee M. Youn, Rainer L...
ECRTS
2007
IEEE
16 years 1 months ago
Cache-Aware Timing Analysis of Streaming Applications
Of late, there has been a considerable interest in models, algorithms and methodologies specifically targeted towards designing hardware and software for streaming applications. ...
Samarjit Chakraborty, Tulika Mitra, Abhik Roychoud...
ISCAS
2007
IEEE
180views Hardware» more  ISCAS 2007»
16 years 1 months ago
Characterization of a Fault-tolerant NoC Router
— With increasing reliability concerns for current and next generation VLSI technologies, fault-tolerance is fast becoming an integral part of system-on-chip (SoC) and multicore ...
Sumit D. Mediratta, Jeffrey T. Draper
LCTRTS
2007
Springer
16 years 26 days ago
Enabling compiler flow for embedded VLIW DSP processors with distributed register files
High-performance and low-power VLIW DSP processors are increasingly deployed on embedded devices to process video and multimedia applications. For reducing power and cost in desig...
Chung-Kai Chen, Ling-Hua Tseng, Shih-Chang Chen, Y...
APCSAC
2006
IEEE
16 years 24 days ago
A High Performance Simulator System for a Multiprocessor System Based on a Multi-way Cluster
In the ubiquitous era, it is necessary to research the architectures of multiprocessor system with high performance and low power consumption. A simulator developed in high level l...
Arata Shinozaki, Masatoshi Shima, Minyi Guo, Mitsu...
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