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DATE
2006
IEEE
121views Hardware» more  DATE 2006»
16 years 16 days ago
Analysis of the impact of bus implemented EDCs on on-chip SSN
In this paper we analyze the impact of error detecting codes, implemented on an on-chip bus, on the on-chip simultaneous switching noise (SSN). First, we analyze in detail how SSN...
Daniele Rossi, Carlo Steiner, Cecilia Metra
CARDIS
2004
Springer
216views Hardware» more  CARDIS 2004»
15 years 12 months ago
Differential Fault Analysis Attack Resistant Architectures for the Advanced Encryption Standard
: We present two architectures for protecting a hardware implementation of AES against side-channel attacks known as Differential Fault Analysis attacks. The first architecture, wh...
Mark G. Karpovsky, Konrad J. Kulikowski, Alexander...
CODES
2002
IEEE
15 years 11 months ago
Worst-case performance analysis of parallel, communicating software processes
In this paper we present a method to perform static timing analysis of SystemC models, that describe parallel, communicating software processes.The paper combines a worstcase exec...
Axel Siebenborn, Oliver Bringmann, Wolfgang Rosens...
CSMR
2009
IEEE
15 years 11 months ago
Discovering Comprehension Pitfalls in Class Hierarchies
Despite many advances in program comprehension, polymorphism and inheritance are still the cause of many misunderstandings in object-oriented code. In this paper, we present a sui...
Petru Florin Mihancea, Radu Marinescu
ICDAR
2007
IEEE
15 years 10 months ago
Identification of Latin-Based Languages through Character Stroke Categorization
This paper presents a language identification technique that detects Latin-based languages of imaged documents without OCR. The proposed technique detects languages through the wo...
S. J. Lu, L. Li, Chew Lim Tan