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FAC
2008
97views more  FAC 2008»
15 years 6 months ago
A functional formalization of on chip communications
This paper presents a formal model and a systematic approach to the validation of communication tures at a high level of abstraction. This model is described mathematically by a fu...
Julien Schmaltz, Dominique Borrione
QRE
2010
84views more  QRE 2010»
15 years 4 months ago
Three-level and mixed-level orthogonal arrays for lean designs
Orthogonal arrays (OA’s) are widely used in design of experiments. Each OA has a specific number of rows that is fixed by the number of factors in the OA and the number of leve...
Chang-Xing Ma, Ming-Yao Ai, L. Y. Chan, T. N. Goh
TCAD
2011
15 years 25 days ago
High-Level Synthesis for FPGAs: From Prototyping to Deployment
—Escalating system-on-chip design complexity is the design community to raise the level of abstraction beyond register transfer level. Despite the unsuccessful adoptions of early...
Jason Cong, Bin Liu, Stephen Neuendorffer, Juanjo ...
HASE
2008
IEEE
16 years 25 days ago
Formal Support for Quantitative Analysis of Residual Risks in Safety-Critical Systems
With the increasing complexity in software and electronics in safety-critical systems new challenges to lower the costs and decrease time-to-market, while preserving high assuranc...
Jonas Elmqvist, Simin Nadjm-Tehrani
ICNS
2007
IEEE
16 years 20 days ago
A Routing Based Service Discovery Protocol for Ad hoc Networks
: Ad hoc networks are networks that consist of wireless mobile nodes. They are networks that do not require any preestablished infrastructure. Their ability to quickly and dynamica...
Abdel Obaid, Azeddine Khir, Hafedh Mili