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DCC
2007
IEEE
16 years 6 months ago
Algorithms and Hardware Structures for Unobtrusive Real-Time Compression of Instruction and Data Address Traces
Instruction and data address traces are widely used by computer designers for quantitative evaluations of new architectures and workload characterization, as well as by software de...
Milena Milenkovic, Aleksandar Milenkovic, Martin B...
SODA
2010
ACM
201views Algorithms» more  SODA 2010»
16 years 3 months ago
Incentive Compatible Budget Elicitation in Multi-unit Auctions
In this paper, we consider the problem of designing incentive compatible auctions for multiple (homogeneous) units of a good, when bidders have private valuations and private budg...
Sayan Bhattacharya, Vincent Conitzer, Kamesh Munag...
SDM
2009
SIAM
149views Data Mining» more  SDM 2009»
16 years 3 months ago
Speeding Up Secure Computations via Embedded Caching.
Most existing work on Privacy-Preserving Data Mining (PPDM) focus on enabling conventional data mining algorithms with the ability to run in a secure manner in a multi-party setti...
K. Zhai, W. K. Ng, A. R. Herianto, S. Han
EUROSYS
2006
ACM
16 years 3 months ago
The SMART way to migrate replicated stateful services
Many stateful services use the replicated state machine approach for high availability. In this approach, a service runs on multiple machines to survive machine failures. This pap...
Jacob R. Lorch, Atul Adya, William J. Bolosky, Ron...
ICCAD
2002
IEEE
142views Hardware» more  ICCAD 2002»
16 years 3 months ago
SAT and ATPG: Boolean engines for formal hardware verification
In this survey, we outline basic SAT- and ATPGprocedures as well as their applications in formal hardware verification. We attempt to give the reader a trace trough literature and...
Armin Biere, Wolfgang Kunz
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