3522 search results - page 64 / 705 » Incremental physical design |
173
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VLSID
2009
IEEE
16 years 6 months ago
2009
IEEE
Functional validation is a major bottleneck in the current SOC design methodology. While specification-based validation techniques have proposed several promising ideas, the time ...
146
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INFOCOM
2003
IEEE
15 years 11 months ago
2003
IEEE
— Pipelined ASIC architectures are increasingly being used in forwarding engines for high speed IP routers. We explore optimization issues in the design of memory-efficient data...
168
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ICSM
2005
IEEE
15 years 12 months ago
2005
IEEE
In the context of software maintenance, legacy software systems are continuously re-engineered in order to correct errors, provide new functionality, or port them into modern plat...
159
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DAC
2009
ACM
16 years 1 months ago
2009
ACM
It is unknown how to include stochastic process variation into fast-multipole-method (FMM) for a full chip capacitance extraction. This paper presents a parallel FMM extraction us...
161
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ASPDAC
2005
ACM
15 years 12 months ago
2005
ACM
: In ultra-deep submicron VLSI circuits, clock network is a major source of power consumption and power supply noise. Therefore, it is very important to minimize clock network size...