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DATE
2004
IEEE
138views Hardware» more  DATE 2004»
15 years 10 months ago
Energy-Efficient Design for Highly Associative Instruction Caches in Next-Generation Embedded Processors
This paper proposes a low-energy solution for CAMbased highly associative I-caches using a segmented wordline and a predictor-based instruction fetch mechanism. Not all instructio...
Juan L. Aragón, Dan Nicolaescu, Alexander V...
ICCE
2007
112views Education» more  ICCE 2007»
15 years 8 months ago
Collaborative Lesson-preparing Environments: EduWiki Designing and its Applications
: Eduwiki is a version of Wiki integrated educational special needs aims to support collaborative lesson-preparing. The paper described the workflow and function of developing Eduw...
Yueliang Zhou, Chaohua Gong
CHI
1998
ACM
15 years 10 months ago
The Vista Environment for the Coevolutionary Design of User Interfaces
User centered design requires the creation of numerous design artifacts such as task hierarchy, task-oriented specification, user interface design, architecture design and code. I...
Judy Brown, T. C. Nicholas Graham, Timothy N. Wrig...
ASAP
2006
IEEE
130views Hardware» more  ASAP 2006»
16 years 18 days ago
Cross Layer Design to Multi-thread a Data-Pipelining Application on a Multi-processor on Chip
Data-Pipelining is a widely used model to represent streaming applications. Incremental decomposition and optimization of a data-pipelining application onto a multi-processor plat...
Bo-Cheng Charles Lai, Patrick Schaumont, Wei Qin, ...
VLSID
2002
IEEE
172views VLSI» more  VLSID 2002»
16 years 6 months ago
Improvement of ASIC Design Processes
With device counts on modern-day ASICs crossing the 10 million mark, careful planning of an ASIC design project is necessary to meet time deadlines. Two problems arise in this con...
Vineet Sahula, C. P. Ravikumar, D. Nagchoudhuri