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ISVLSI
2007
IEEE
181views VLSI» more  ISVLSI 2007»
16 years 18 days ago
Code-coverage Based Test Vector Generation for SystemC Designs
Abstract— Time-to-Market plays a central role on System-ona-Chip (SoC) competitiveness and the quality of the final product is a matter of concern as well. As SoCs complexity in...
Alair Dias Jr., Diógenes Cecilio da Silva J...
KBSE
2007
IEEE
16 years 18 days ago
Checking threat modeling data flow diagrams for implementation conformance and security
Threat modeling analyzes how an adversary might attack a system by supplying it with malicious data or interacting with it. The analysis uses a Data Flow Diagram (DFD) to describe...
Marwan Abi-Antoun, Daniel Wang, Peter Torr
MEMOCODE
2007
IEEE
16 years 18 days ago
Combining Multi-Valued Logics in SAT-based ATPG for Path Delay Faults
Due to the rapidly growing speed and the decreasing size of gates in modern chips, the probability of faults caused by the production process grows. Already small variations lead ...
Stephan Eggersglüß, Görschwin Fey,...
PDP
2007
IEEE
16 years 18 days ago
Automated Deployment Support for Parallel Distributed Computing
Heterogeneous distributed computing platforms continue to require substantial effort in terms of software installation and management for efficient use, often necessitating manua...
Magdalena Slawiñska, Dawid Kurzyniec, Jaros...
RTCSA
2007
IEEE
16 years 17 days ago
Modeling Real-time Garbage Collection Cost
Given the major advantages of productivity and safety, the use of garbage collection (GC) in real-time systems has gained increasing attention. Guaranteeing garbage collection act...
Wei Fu, Carl Hauser