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2005
ACM
15 years 12 months ago
Performance-constrained Distributed DVS Scheduling for Scientific Applications on Power-aware Clusters
Left unchecked, the fundamental drive to increase peak performance using tens of thousands of power hungry components will lead to intolerable operating costs and failure rates. H...
Rong Ge, Xizhou Feng, Kirk W. Cameron
ISLPED
2004
ACM
124views Hardware» more  ISLPED 2004»
15 years 11 months ago
Application adaptive energy efficient clustered architectures
As clock frequency and die area increase, achieving energy efficiency, while distributing a low skew, global clock signal becomes increasingly difficult. Challenges imposed by dee...
Diana Marculescu
SAC
2004
ACM
15 years 11 months ago
DSPxPlore: design space exploration methodology for an embedded DSP core
High mask and production costs for the newest CMOS silicon technologies increase the pressure to develop hardware platforms useable for different applications or variants of the s...
Christian Panis, Ulrich Hirnschrott, Gunther Laure...
EUC
2004
Springer
15 years 11 months ago
Non-uniform Set-Associative Caches for Power-Aware Embedded Processors
Abstract. Power consumption is becoming one of the most important constraints for microprocessor design in nanometer-scale technologies. Especially, as the transistor supply voltag...
Seiichiro Fujii, Toshinori Sato
CLUSTER
2003
IEEE
15 years 11 months ago
Interstitial Computing: Utilizing Spare Cycles on Supercomputers
This paper presents an analysis of utilizing unused cycles on supercomputers through the use of many small jobs. What we call “interstitial computing,” is important to superco...
Stephen D. Kleban, Scott H. Clearwater