661 search results - page 34 / 133 » Increasing Processor Performance by Implementing Deeper Pipe... |
144
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MICRO
1999
IEEE
15 years 10 months ago
1999
IEEE
Branch mispredictions can have a major performance impact on high-performance processors. Multipath execution has recently been introduced to help limit the misprediction penaltie...
149
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MICRO
2003
IEEE
15 years 11 months ago
2003
IEEE
Ensuring back-to-back execution of dependent instructions in a conventional out-of-order processor requires scheduling logic that wakes up and selects instructions at the same rat...
214
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ISCA
2011
IEEE
14 years 9 months ago
2011
IEEE
High assurance systems used in avionics, medical implants, and cryptographic devices often rely on a small trusted base of hardware and software to manage the rest of the system. ...
177
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INFOCOM
2006
IEEE
15 years 12 months ago
2006
IEEE
— We show that different flavors of TCP may be viewed as implementations of age-based scheduling disciplines. By parameterizing the scheduling disciplines of interest we are abl...
169
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LCTRTS
2007
Springer
16 years 3 days ago
2007
Springer
High-performance and low-power VLIW DSP processors are increasingly deployed on embedded devices to process video and multimedia applications. For reducing power and cost in desig...