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ASPDAC
2004
ACM
158views Hardware» more  ASPDAC 2004»
15 years 10 months ago
Decode filter cache for energy efficient instruction cache hierarchy in super scalar architectures
Abstract-- The power consumption of microprocessors has been increasing in step with the complexity of each progressive generation. In general purpose processors, this is primarily...
Kugan Vivekanandarajah, Thambipillai Srikanthan, S...
ASYNC
2004
IEEE
102views Hardware» more  ASYNC 2004»
15 years 10 months ago
Non-Uniform Access Asynchronous Register Files
Register files of microprocessors have often been cited as performance bottlenecks and significant consumers of energy. The robust and modular nature of quasi-delay insensitive (Q...
David Fang, Rajit Manohar
CCGRID
2004
IEEE
15 years 10 months ago
Design and implementation of an OGSI-compliant Grid broker service
Grid computing promises the ability to share geographically and organizationally distributed resources to increase effective computational power and resource utilization. However,...
Youn-Seok Kim, Jung-Lok Yu, Jae-Gyoon Hahm, Jinsoo...
CF
2004
ACM
15 years 10 months ago
An architecture to support cooperating mobile embedded systems
There is a sustained trend to embed computer systems in all kinds of intelligent products. Increasing emphasis is given to enhance the functionality of such systems beyond the pro...
Edgar Nett, Stefan Schemmer
ARCS
2006
Springer
15 years 10 months ago
Efficient System-on-Chip Energy Management with a Segmented Bloom Filter
As applications tend to grow more complex and use more memory, the demand for cache space increases. Thus embedded processors are inclined to use larger caches. Predicting a miss i...
Mrinmoy Ghosh, Emre Özer, Stuart Biles, Hsien...