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ICCAD
2007
IEEE
131views Hardware» more  ICCAD 2007»
16 years 3 months ago
Low-overhead design technique for calibration of maximum frequency at multiple operating points
— Determination of maximum operating frequencies (Fmax) during manufacturing test at different operating voltages is required to: (a) to ensure that, for a Dynamic Voltage and Fr...
Somnath Paul, Sivasubramaniam Krishnamurthy, Hamid...
ICCAD
2006
IEEE
134views Hardware» more  ICCAD 2006»
16 years 3 months ago
A delay fault model for at-speed fault simulation and test generation
We describe a transition fault model, which is easy to simulate under test sequences that are applied at-speed, and provides a target for the generation of at-speed test sequences...
Irith Pomeranz, Sudhakar M. Reddy
ICCAD
2006
IEEE
124views Hardware» more  ICCAD 2006»
16 years 3 months ago
A linear-time approach for static timing analysis covering all process corners
Abstract—Manufacturing process variations lead to circuit timing variability and a corresponding timing yield loss. Traditional corner analysis consists of checking all process c...
Sari Onaissi, Farid N. Najm
ICCAD
2005
IEEE
95views Hardware» more  ICCAD 2005»
16 years 3 months ago
Application-specific network-on-chip architecture customization via long-range link insertion
Networks-on-Chip (NoCs) represent a promising solution to complex on-chip communication problems. The NoC communication architectures considered so far are based on either complete...
Ümit Y. Ogras, Radu Marculescu
ICCAD
2004
IEEE
94views Hardware» more  ICCAD 2004»
16 years 3 months ago
Timing macro-modeling of IP blocks with crosstalk
With the increase of design complexities and the decrease of minimal feature sizes, IP reuse is becoming a common practice while crosstalk is becoming a critical issue that must b...
Ruiming Chen, Hai Zhou