16994 search results - page 253 / 3399 » Improving the Performance of maxRPC |
176
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ACMMSP
2004
ACM
16 years 2 days ago
2004
ACM
As superscalar processors become increasingly wide, it is inevitable that the large set of instructions to be fetched every cycle will span multiple noncontiguous basic blocks. Th...
169
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CC
2003
Springer
15 years 12 months ago
2003
Springer
Cache memories were invented to decouple fast processors from slow memories. However, this decoupling is only partial, and many researchers have attempted to improve cache use by p...
175
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GECCO
2009
Springer
15 years 11 months ago
2009
Springer
The performance of a Multiobjective Evolutionary Algorithm (MOEA) is crucially dependent on the parameter setting of the operators. The most desired control of such parameters pre...
168
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SC
2000
ACM
15 years 11 months ago
2000
ACM
We demonstrate that data reordering can substantially improve the performance of fine-grained irregular sharedmemory benchmarks, on both hardware and software shared-memory syste...
152
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ISCA
1997
IEEE
15 years 11 months ago
1997
IEEE
Superscalar processors currently have the potential to fetch multiple basic blocks per cycle by employing one of several recently proposed instruction fetch mechanisms. However, t...