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PATMOS
2005
Springer
16 years 1 hour ago
Improving the Memory Bandwidth Utilization Using Loop Transformations
Abstract. Embedded devices designed for various real-time multimedia and telecom applications, have a bottleneck in energy consumption and performance that becomes day by day more ...
Minas Dasygenis, Erik Brockmeyer, Francky Catthoor...
HCI
2007
15 years 8 months ago
Development of Productivity Evaluation Method to Improve Office Environment
The authors have developed a performance test, CPTOP (Cognitive Performance Test of Productivity), which combines 11 basic task testss to evaluate intelligent abilities of office w...
Hiroshi Shimoda, Kyoko Ito, Yoko Hattori, Hirotake...
ASPDAC
2006
ACM
153views Hardware» more  ASPDAC 2006»
16 years 14 days ago
Diagonal routing in high performance microprocessor design
This paper presents a diagonal routing method which is applied to an actual microprocessor prototype chip. While including the layout functions for the conventional Manhattan rout...
Noriyuki Ito, Hideaki Katagiri, Ryoichi Yamashita,...
JCC
2006
69views more  JCC 2006»
15 years 6 months ago
Dramatic performance enhancements for the FASTER optimization algorithm
: FASTER is a combinatorial optimization algorithm useful for finding low-energy side-chain configurations in side-chain placement and protein design calculations. We present two s...
Benjamin D. Allen, Stephen L. Mayo
DATE
2005
IEEE
117views Hardware» more  DATE 2005»
16 years 4 days ago
Extended Control Flow Graph Based Performance Optimization Using Scratch-Pad Memory
This paper presents an exploration approach for the researcher to choose the suitable size of Scratch-Pad memory (SPM) for maximal performance improvement of a specified applicat...
Pu Hanlai, Ling Ming, Jin Jing