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1999
Tsinghua U.
15 years 11 months ago
Symmetry and performance in consistency protocols
A consistency protocol can be termed symmetric if all processors are treated identically when they access common resources. By contrast, asymmetric protocols usually assign a home...
Peter J. Keleher
NIPS
2008
15 years 8 months ago
Effects of Stimulus Type and of Error-Correcting Code Design on BCI Speller Performance
From an information-theoretic perspective, a noisy transmission system such as a visual Brain-Computer Interface (BCI) speller could benefit from the use of errorcorrecting codes....
N. Jeremy Hill, Jason Farquhar, Suzanna Martens, F...
ICPP
2007
IEEE
16 years 28 days ago
Multi-Layer Event Trace Analysis for Parallel I/O Performance Tuning
The complexity of parallel I/O systems lies in the deep I/O stack with many software layers and concurrent I/O request handling at multiple layers. This paper explores multi-layer...
Pin Lu, Kai Shen
JDWM
2006
178views more  JDWM 2006»
15 years 6 months ago
Improved Data Partitioning for Building Large ROLAP Data Cubes in Parallel
The pre-computation of data cubes is critical to improving the response time of On-Line Analytical Processing (OLAP) systems and can be instrumental in accelerating data mining ta...
Ying Chen, Frank K. H. A. Dehne, Todd Eavis, Andre...
SBACPAD
2008
IEEE
206views Hardware» more  SBACPAD 2008»
16 years 1 months ago
A High Performance Massively Parallel Approach for Real Time Deformable Body Physics Simulation
Single processor technology has been evolving across last decades, but due to physical limitations of chip manufacturing process, the industry is pursuing alternatives to sustain ...
Thiago S. M. C. de Farias, Mozart W. S. Almeida, J...