1001 search results - page 96 / 201 » Improving memory hierarchy performance for irregular applica... |
205
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HPCA
2011
IEEE
14 years 10 months ago
2011
IEEE
Future CMPs will combine many simple cores with deep cache hierarchies. With more cores, cache resources per core are fewer, and must be shared carefully to avoid poor utilization...
179
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DATE
2010
IEEE
15 years 11 months ago
2010
IEEE
Abstract— The optimal size of a large on-chip cache can be different for different programs: at some point, the reduction of cache misses achieved when increasing cache size hits...
193
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FTTCS
2006
15 years 6 months ago
2006
Data sets in large applications are often too massive to fit completely inside the computer's internal memory. The resulting input/output communication (or I/O) between fast ...
162
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HPCA
2002
IEEE
15 years 11 months ago
2002
IEEE
As the frequency gap between main memory and modern microprocessor grows, the implementation and efficiency of on-chip caches become more important. The growing latency to memory ...
170
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ICPP
2008
IEEE
16 years 27 days ago
2008
IEEE
We introduce Scioto, Shared Collections of Task Objects, a lightweight framework for providing task management on distributed memory machines under one-sided and globalview parall...