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USENIX
2008
15 years 8 months ago
LeakSurvivor: Towards Safely Tolerating Memory Leaks for Garbage-Collected Languages
Continuous memory leaks severely hurt program performance and software availability for garbage-collected programs. This paper presents a safe method, called LeakSurvivor, to tole...
Yan Tang, Qi Gao, Feng Qin
ISCAPDCS
2003
15 years 7 months ago
Utilization of Separate Caches to Eliminate Cache Pollution Caused by Memory Management Functions
Data intensive service functions such as memory allocation/de-allocation, data prefetching, and data relocation can pollute processor cache in conventional systems since the same ...
Mehran Rezaei, Krishna M. Kavi
MICRO
1998
IEEE
129views Hardware» more  MICRO 1998»
15 years 10 months ago
A Bandwidth-efficient Architecture for Media Processing
Media applications are characterized by large amounts of available parallelism, little data reuse, and a high computation to memory access ratio. While these characteristics are p...
Scott Rixner, William J. Dally, Ujval J. Kapasi, B...
ICPADS
2006
IEEE
16 years 14 days ago
Loop Scheduling with Complete Memory Latency Hiding on Multi-core Architecture
The widening gap between processor and memory performance is the main bottleneck for modern computer systems to achieve high processor utilization. In this paper, we propose a new...
Chun Xue, Zili Shao, Meilin Liu, Mei Kang Qiu, Edw...
HPCA
2000
IEEE
15 years 10 months ago
Design of a Parallel Vector Access Unit for SDRAM Memory Systems
We are attacking the memory bottleneck by building a “smart” memory controller that improves effective memory bandwidth, bus utilization, and cache efficiency by letting appl...
Binu K. Mathew, Sally A. McKee, John B. Carter, Al...