1001 search results - page 78 / 201 » Improving memory hierarchy performance for irregular applica... |
160
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ICCD
2006
IEEE
16 years 3 months ago
2006
IEEE
—This paper introduces the microarchitecture and logical implementation of SMT (Simultaneous Multithreading) improvement of Godson-2 processor which is a 64-bit, four-issue, out-...
163
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ISHPC
2003
Springer
15 years 11 months ago
2003
Springer
We developed a multithreaded parallel implementation of a sequence alignment algorithm that is able to align whole genomes with reliable output and reasonable cost. This paper pres...
179
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DAC
2007
ACM
16 years 7 months ago
2007
ACM
The memory hierarchy of a system can consume up to 50% of microprocessor system power. Previous work has shown that tuning a configurable cache to a particular application can red...
207
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ICS
2007
Tsinghua U.
16 years 17 days ago
2007
Tsinghua U.
Strassen’s matrix multiplication (MM) has benefits with respect to any (highly tuned) implementations of MM because Strassen’s reduces the total number of operations. Strasse...
167
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EUROPAR
2001
Springer
15 years 11 months ago
2001
Springer
A new methodology is presented in this paper for resource management in a metacomputing environment using a hierarchy of homogeneous agents that has the capability of service disco...