1001 search results - page 136 / 201 » Improving memory hierarchy performance for irregular applica... |
175
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IEEEPACT
2009
IEEE
16 years 29 days ago
2009
IEEE
Industry is moving towards multi-core designs as we have hit the memory and power walls. Multi-core designs are very effective to exploit thread-level parallelism (TLP) but do not...
154
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JCSS
2008
15 years 6 months ago
2008
Dynamically allocating computing nodes to parallel applications is a promising technique for improving the utilization of cluster resources. Detailed simulations can help identify...
163
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IPPS
2005
IEEE
15 years 12 months ago
2005
IEEE
Power consumption is a troublesome design constraint for emergent systems such as IBM’s BlueGene /L. If current trends continue, future petaflop systems will require 100 megawat...
184
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ALGORITHMICA
2000
15 years 6 months ago
2000
We study the problem of minimizing the expected cost of binary searching for data where the access cost is not fixed and depends on the last accessed element, such as data stored i...
207
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ASPLOS
2011
ACM
14 years 10 months ago
2011
ACM
Graphics processing units (GPUs) provide a low cost platform for accelerating high performance computations. The introduction of new programming languages, such as CUDA and OpenCL...