1001 search results - page 105 / 201 » Improving memory hierarchy performance for irregular applica... |
210
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CSREAESA
2003
15 years 7 months ago
2003
Energy dissipation in cache memories is becoming a major design issue in embedded microprocessors. Predictive filter cache based instruction cache hierarchy is effective in reduci...
170
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HPCA
2004
IEEE
16 years 6 months ago
2004
IEEE
Modern out-of-order processors tolerate long latency memory operations by supporting a large number of inflight instructions. This is particularly useful in numerical applications...
169
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MIDDLEWARE
2005
Springer
15 years 12 months ago
2005
Springer
The vision of pervasive or ubiquitous computing, conceived by Mark Weiser, foresees a world where computing is embedded in every day objects. Such objects interact with each other...
167
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IVC
2002
15 years 6 months ago
2002
In this paper we address the problem of reliable real-time 3D-tracking of multiple objects which are observed in multiple wide-baseline camera views. Establishing the spatio-tempo...
208
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ICDCS
1997
IEEE
15 years 10 months ago
1997
IEEE
This paper evaluates the use of per-node multi-threading to hide remote memory and synchronization latencies in a software DSM. As with hardware systems, multi-threading in softwa...