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MICRO
2000
IEEE
107views Hardware» more  MICRO 2000»
15 years 10 months ago
Register integration: a simple and efficient implementation of squash reuse
Register integration (or simply integration) is a mechanism for incorporating speculative results directly into a sequential execution using data-dependence relationships. In this...
Amir Roth, Gurindar S. Sohi
ASPDAC
2008
ACM
130views Hardware» more  ASPDAC 2008»
15 years 8 months ago
Architecture-level thermal behavioral characterization for multi-core microprocessors
In this paper, we investigate a new architecture-level thermal characterization problem from behavioral modeling perspective to address the emerging thermal related analysis and o...
Duo Li, Sheldon X.-D. Tan, Murli Tirumala
ISLPED
2010
ACM
169views Hardware» more  ISLPED 2010»
15 years 7 months ago
TurboTag: lookup filtering to reduce coherence directory power
On-chip coherence directories of today's multi-core systems are not energy efficient. Coherence directories dissipate a significant fraction of their power on unnecessary loo...
Pejman Lotfi-Kamran, Michael Ferdman, Daniel Crisa...
VTC
2010
IEEE
159views Communications» more  VTC 2010»
15 years 5 months ago
Architectural Analysis of a Smart DMA Controller for Protocol Stack Acceleration in LTE Terminals
—In this paper we present an architectural analysis of a smart DMA (sDMA) controller for protocol stack acceleration in mobile devices supporting 3GPP’s Long Term Evolution (LT...
Sebastian Hessel, David Szczesny, Felix Bruns, Att...
SIGMETRICS
2011
ACM
139views Hardware» more  SIGMETRICS 2011»
14 years 9 months ago
Slick packets
Source-controlled routing has been proposed as a way to improve flexibility of future network architectures, as well as simplifying the data plane. However, if a packet specifie...
Giang T. K. Nguyen, Rachit Agarwal, Junda Liu, Mat...