Sciweavers

5523 search results - page 705 / 1105
» Improving application performance with hardware data structu...
Sort
View
212
Voted
MICRO
2008
IEEE
114views Hardware» more  MICRO 2008»
16 years 1 months ago
Toward a multicore architecture for real-time ray-tracing
Significant improvement to visual quality for real-time 3D graphics requires modeling of complex illumination effects like soft-shadows, reflections, and diffuse lighting intera...
Venkatraman Govindaraju, Peter Djeu, Karthikeyan S...
CORR
2002
Springer
156views Education» more  CORR 2002»
15 years 6 months ago
Mapping the Gnutella Network: Properties of Large-Scale Peer-to-Peer Systems and Implications for System Design
Despite recent excitement generated by the peer-to-peer (P2P) paradigm and the surprisingly rapid deployment of some P2P applications, there are few quantitative evaluations of P2...
Matei Ripeanu, Ian T. Foster, Adriana Iamnitchi
CCGRID
2006
IEEE
15 years 10 months ago
A Feedback Mechanism for Network Scheduling in LambdaGrids
Next-generation e-Science applications will require the ability to transfer information at high data rates between distributed computing centers and data repositories. A LambdaGri...
Pallab Datta, Sushant Sharma, Wu-chun Feng
ISCA
2012
IEEE
260views Hardware» more  ISCA 2012»
13 years 9 months ago
A case for exploiting subarray-level parallelism (SALP) in DRAM
Modern DRAMs have multiple banks to serve multiple memory requests in parallel. However, when two requests go to the same bank, they have to be served serially, exacerbating the h...
Yoongu Kim, Vivek Seshadri, Donghyuk Lee, Jamie Li...
ISCA
2007
IEEE
168views Hardware» more  ISCA 2007»
16 years 1 months ago
Limiting the power consumption of main memory
The peak power consumption of hardware components affects their power supply, packaging, and cooling requirements. When the peak power consumption is high, the hardware components...
Bruno Diniz, Dorgival Olavo Guedes Neto, Wagner Me...