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2002
IEEE
15 years 11 months ago
Noncontiguous I/O through PVFS
With the tremendous advances in processor and memory technology, I/O has risen to become the bottleneck in high-performance computing for many applications. The development of par...
Avery Ching, Alok N. Choudhary, Wei-keng Liao, Rob...
CASES
2001
ACM
15 years 10 months ago
A system-on-a-chip lock cache with task preemption support
Intertask/interprocess synchronization overheads may be significant in a multiprocessor-shared memory System-on-a-Chip implementation. These overheads are observed in terms of loc...
Bilge Saglam Akgul, Jaehwan Lee, Vincent John Moon...
LCPC
2005
Springer
16 years 9 days ago
Loop Selection for Thread-Level Speculation
Thread-level speculation (TLS) allows potentially dependent threads to speculatively execute in parallel, thus making it easier for the compiler to extract parallel threads. Howeve...
Shengyue Wang, Xiaoru Dai, Kiran Yellajyosula, Ant...
ICCV
2011
IEEE
14 years 6 months ago
Evaluation of Image Features Using a Photorealistic Virtual World
Image features are widely used in computer vision applications. They need to be robust to scene changes and image transformations. Designing and comparing feature descriptors requ...
Biliana Kaneva, Antonio Torralba, Bill Freeman
IEEEPACT
2008
IEEE
16 years 1 months ago
Characterizing and modeling the behavior of context switch misses
One of the essential features in modern computer systems is context switching, which allows multiple threads of execution to time-share a limited number of processors. While very ...
Fang Liu, Fei Guo, Yan Solihin, Seongbeom Kim, Abd...