Sciweavers

5523 search results - page 660 / 1105
» Improving application performance with hardware data structu...
Sort
View
MICRO
2007
IEEE
94views Hardware» more  MICRO 2007»
16 years 1 months ago
Uncorq: Unconstrained Snoop Request Delivery in Embedded-Ring Multiprocessors
Snoopy cache coherence can be implemented in any physical network topology by embedding a logical unidirectional ring in the network. Control messages are forwarded using the ring...
Karin Strauss, Xiaowei Shen, Josep Torrellas
MICRO
2003
IEEE
147views Hardware» more  MICRO 2003»
16 years 2 days ago
Flexible Compiler-Managed L0 Buffers for Clustered VLIW Processors
Wire delays are a major concern for current and forthcoming processors. One approach to attack this problem is to divide the processor into semi-independent units referred to as c...
Enric Gibert, F. Jesús Sánchez, Anto...
HPCA
2009
IEEE
16 years 7 months ago
Hardware-software integrated approaches to defend against software cache-based side channel attacks
Software cache-based side channel attacks present serious threats to modern computer systems. Using caches as a side channel, these attacks are able to derive secret keys used in ...
Jingfei Kong, Onur Aciiçmez, Jean-Pierre Se...
ISCA
2007
IEEE
149views Hardware» more  ISCA 2007»
16 years 1 months ago
Virtual private caches
Virtual Private Machines (VPM) provide a framework for Quality of Service (QoS) in CMP-based computer systems. VPMs incorporate microarchitecture mechanisms that allow shares of h...
Kyle J. Nesbit, James Laudon, James E. Smith
271
Voted
SIGMETRICS
2000
ACM
217views Hardware» more  SIGMETRICS 2000»
15 years 6 months ago
Experimenting with an Ad Hoc wireless network on campus: insights and experiences
Ad hoc wireless networks are new communication networks that can be dynamically formed and deformed onthe- y, anytime and anywhere. User data is routed with the help of an ad hoc ...
Chai-Keong Toh, Richard Chen, Minar Delwar, Donald...