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IWMM
2011
Springer
270views Hardware» more  IWMM 2011»
14 years 9 months ago
Memory management in NUMA multicore systems: trapped between cache contention and interconnect overhead
Multiprocessors based on processors with multiple cores usually include a non-uniform memory architecture (NUMA); even current 2-processor systems with 8 cores exhibit non-uniform...
Zoltan Majo, Thomas R. Gross
HPDC
2008
IEEE
16 years 1 months ago
enabling cross-layer optimizations in storage systems with custom metadata
Today, several data-storage systems allow applications to create and manage custom metadata to improve data search and navigability in large-scale storage systems. Our thesis is t...
Elizeu Santos-Neto, Samer Al-Kiswany, Nazareno And...
IEEEPACT
1998
IEEE
15 years 11 months ago
Exploiting Method-Level Parallelism in Single-Threaded Java Programs
Method speculation of object-oriented programs attempts to exploit method-level parallelism (MLP) by executing sequential method invocations in parallel, while still maintaining c...
Michael K. Chen, Kunle Olukotun
VEE
2009
ACM
171views Virtualization» more  VEE 2009»
16 years 1 months ago
Dynamic memory balancing for virtual machines
Virtualization essentially enables multiple operating systems and applications to run on one physical computer by multiplexing hardware resources. A key motivation for applying vi...
Weiming Zhao, Zhenlin Wang
UIST
1994
ACM
15 years 11 months ago
A Perceptually-Supported Sketch Editor
The human visual system makes a great deal more of images than the elemental marks on a surface. In the course of viewing, creating, or editing a picture, we actively construct a ...
Eric Saund, Thomas P. Moran